As shown in FIG. 1, a conventional buck-boost power converter 10 includes a power stage 12 operated by a control circuit 14. In the power stage 12, a switch SW1 is coupled between a power input terminal Vin and an inductor L, switches SW2 and SW3 are coupled between two terminals of the inductor L and a ground terminal GND respectively, and a switch SW4 is coupled between the inductor L and a power output terminal Vout. Voltage divider resistors R1 and R2 divide the output voltage Vout to generate a feedback signal VFB. In the control circuit 14, an error amplifier 24 generates an error signal VEA according to the feedback signal VFB and a reference voltage Vref, a ramp generator 22 provides two sawtooth signals SAW1 and SAW2, comparators 18 and 20 compare the error signal VEA with the sawtooth signals SAW 1 and SAW2 to generate signals PWM1 and PWM2 respectively, and a control logic 16 generates control signals VA, VB, VC and VD according to the signals PWM1 and PWM2 to switch the switches SW1-SW4 respectively, to thereby convert the input voltage Vin into the output voltage Vout. When the error signal VEA intersects either the sawtooth signal SAW1 or the sawtooth signal SAW2, the power converter 10 operates in a buck mode or a boost mode; when the error signal VEA intersects both the sawtooth signals SAW1 and SAW2, the power converter 10 operates in a buck-boost mode. However, the waveforms of the sawtooth signals SAW1 and SAW2 are not ideally linear near the peaks and the valleys, and therefore, when the input voltage Vin approaches the output voltage Vout, i.e., when the signal PWM1 or PWM2 has a duty ratio approaching 100%, the aforesaid nonlinearity will cause significant ripple in the output voltage Vout.
U.S. Pat. No. 7,176,667 to Chen et al. proposes a buck-boost power converter which, in a buck-boost mode, uses a sawtooth signal and an error signal to intersect to decide a desired buck or boost duty, with a fixed boost or buck duty inserted thereto additionally. However, no matter the power converter of FIG. 1 or the power converter of Chen et al., when it operates in a buck-boost mode, switches are switched in the cyclic sequence that (1) turns on the switches SW2, SW4 and turns off the switches SW1, SW3, (2) turns on the switches SW1, SW4 and turns off the switches SW2, SW3, (3) turns on the switches SW1, SW3 and turns off the switches SW2, SW4, and (4) turns on the switches SW1, SW4 and turns off the switches SW2, SW3. Since the switches are turned on and off several times in each cycle, the resultant switching loss is considerable.
Therefore, it is desired a buck-boost power converter uses a novel switching sequence to reduce switching loss.